Silicon Laboratories SI4421 Instrukcja Użytkownika Pobierz pdf (Strona 22)

Si4702/03-C19

22 Rev. 1.1

5. Register Summary

Reg

Name D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

00h DEVICEID PN[3:0] MFGID[11:0]

01h CHIPID REV[5:0] DEV[3:0] FIRMWARE[5:0]

02h POWERCFG DSMUTE DMUTE MONO 0 RDSM

SKMODE SEEKUP SEEK 0 DISABLE 0 0 0 0 0 ENABLE

03h CHANNEL TUNE 0 0 0 0 0 CHAN[9:0]

04h SYSCONFIG1 RDSIEN

STCIEN 0 RDS

DE AGCD 0 0 BLNDADJ[1:0] GPIO3[1:0] GPIO2[1:0] GPIO1[1:0]

05h SYSCONFIG2 SEEKTH[7:0] BAND[1:0] SPACE[1:0] VOLUME[3:0]

06h SYSCONFIG3 SMUTER[1:0] SMUTEA[1:0] 0 VOLEXT SKSNR[3:0] SKCNT[3:0]

07h TEST1 XOSCEN AHIZEN

08h TEST2

09h BOOTCONFIG

0Ah STATUSRSSI RDSR

STC SF/BL AFCRL RDSS

2,3

BLERA[1:0]

2,3

ST RSSI[7:0]

0Bh READCHAN BLERB[1:0]

2,3

BLERC[1:0]

2,3

BLERD[1:0]

2,3

READCHAN[9:0]

0Ch RDSA RDSA[15:0]

0Dh RDSB RDSB[15:0]

0Eh RDSC RDSC[15:0]

0Fh RDSD RDSD[15:0]

Notes:

1. Any register not listed is reserved and should not be written. Writing to reserved registers may result in unpredictable behavior.

2. Si4703 only.

3. Available in RDS verbose mode only.

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